# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
# Copyright 2021 Linaro Ltd.
%YAML 1.2
---
$id: http://devicetree.org/schemas/thermal/qcom-lmh.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Qualcomm Limits Management Hardware(LMh)

maintainers:
  - Thara Gopinath <thara.gopinath@linaro.org>

description:
  Limits Management Hardware(LMh) is a hardware infrastructure on some
  Qualcomm SoCs that can enforce temperature and current limits as
  programmed by software for certain IPs like CPU.

properties:
  compatible:
    enum:
      - qcom,sc8180x-lmh
      - qcom,sdm845-lmh
      - qcom,sm8150-lmh

  reg:
    items:
      - description: core registers

  interrupts:
    maxItems: 1

  '#interrupt-cells':
    const: 1

  interrupt-controller: true

  cpus:
    description:
      phandle of the first cpu in the LMh cluster
    maxItems: 1

  qcom,lmh-temp-arm-millicelsius:
    description:
      An integer expressing temperature threshold at which the LMh thermal
      FSM is engaged.

  qcom,lmh-temp-low-millicelsius:
    description:
      An integer expressing temperature threshold at which the state machine
      will attempt to remove frequency throttling.

  qcom,lmh-temp-high-millicelsius:
    description:
      An integer expressing temperature threshold at which the state machine
      will attempt to throttle the frequency.

required:
  - compatible
  - reg
  - interrupts
  - '#interrupt-cells'
  - interrupt-controller
  - cpus
  - qcom,lmh-temp-arm-millicelsius
  - qcom,lmh-temp-low-millicelsius
  - qcom,lmh-temp-high-millicelsius

additionalProperties: false

examples:
  - |
    #include <dt-bindings/interrupt-controller/arm-gic.h>

    lmh@17d70800 {
      compatible = "qcom,sdm845-lmh";
      reg = <0x17d70800 0x400>;
      interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
      cpus = <&CPU4>;
      qcom,lmh-temp-arm-millicelsius = <65000>;
      qcom,lmh-temp-low-millicelsius = <94500>;
      qcom,lmh-temp-high-millicelsius = <95000>;
      interrupt-controller;
      #interrupt-cells = <1>;
    };
